The invention relates generally to microelectronic circuits and, more particularly, to clock receiver circuits for use therein
The operational speed of microprocessors and other microelectronic circuits (e.g., digital integrated circuits) is continuously increasing. As clock frequencies increase, proportionately lower clock skews are generally required. As such, clock distribution has become a major on-chip performance bottleneck within such circuits. One clock distribution strategy that has been successfully implemented in board level circuit designs (i.e., non-microelectronic circuits) to provide reduced clock skew is known as salphasic clocking. Salphasic clocking makes use of standing waves to distribute a clock signal within an electrical system. For various reasons, salphasic clocking has been difficult to implement on-die within microelectronic circuits. Therefore, practical methods and structures for implementing salphasic clocking within microelectronic circuits are generally desired.